1. Field of the Invention
The present invention relates generally to a nonvolatile semiconductor memory device and, more particularly, to an EEPROM capable of electrically erasing the storage data and rewriting the data.
2. Description of the Prior Art
A non-volatile semiconductor memory device capable of electrically erasing the storage data and rewriting new data is known as an EEPROM (Electrically Erasable Programmable Read Only Memory). This EEPROM does not require, unlike an EPROM (Erasable Programmable Read Only Memory), the use of ultraviolet rays when erasing stored data. The EEPROM is therefore capable of electrically erasing and rewriting the data as it remains mounted on a printed wiring board. For this reason, the EEPROM is easy to use and available for a variety of control devices and memory cards.
In a great majority of EEPROMs which have been presently developed, a MOS transistor including a floating gate is employed as a memory cell. A threshold level is varied depending on whether or not electrons are injected into this floating gate, thereby holding "0" and "1". These floating gate type MOS transistors are arrayed in matrix, and the data written to the memory cells are made readable. For this purpose, it is required that control be effected to converge the threshold levels at a predetermined voltage in at least one status of "0" or "1".
This conduces to problems in the form of an excess erase inherent in the NOR type EEPROM and in the form of an excess write inherent in the NAND type EEPROM. A wide variety of methods of solving these problems have been proposed up to now. One of them is a bit-by-verify method. This method is fully disclosed in a paper for 1990 Symposium on VLSI Circuits (pp. 105-106). However, the easy-to-write and hard-to-write degrees differ depending on the memory cells. The time till all-bit writing is completed is rate-determined by the hard-to-write memory cells. There resultantly arises a problem in which the write time becomes longer.